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It is always needed to remember that the manufacture of microcircuits is economically justified only with very mass production and a very small percentage of defects. That is, each mask pattern must be reproduced millions of times without distortion in every lithography process. At the same time, the smaller the elements of the pattern, the more difficult it is to reproduce them and the stricter the requirements for the substrate (where the pattern should be printed on), and for the materials (cleanliness), and for the accuracy of the mechanical parts, and for compliance with all “cooking recipes” - technological processes. This is what thousands of scientists, engineers and highly qualified specialists are doing.
There are a few examples.
Basis: about silicon
Basis: about silicon
Chips are printed on crystalline silicon wafers (substrates). Many identical microcircuits on one wafer. Each drawing is repeated many times. Wafer is moved step-by-step during lithography exposing. The more chips wanted to be printed "in one process", the larger the crystalline silicon wafer should be. Moreover, the crystal should be practically:
perfectly pure (no impurities),
with ideal structure (without crystal lattice defects).
Plate diameter growth from the 1970s to the 2020s.
Source: https://seekingalpha.com/article/1516952-asml-kla-tencor-and-lam-research-to-benefit-from-450mm-wafer-transition
So, to begin with, one need to grow a large (defect-free) silicon crystal (and big a crystal is more difficult to grow than a small one).
Then the crystal must be sawn into sufficiently thin (identical) plates and plates be polished. Each plate should be perfectly flat. Otherwise, the image will not be clear. If the surface of the plate (and hence the resist) is uneven - higher or lower - then the image will not be focused. But the larger the plate, the more difficult it is to make it perfectly flat. However, size matters - in the end, manufacturing microcircuits on large wafers becomes more profitable. And - the size of the plates is constantly growing. This is another of the achievements of scientists and engineers.
Masks / images alignment
Masks / images alignment
Further, the number of layers in a microchip - and hence the number of lithography processes - has long exceeded a dozen. That is, on the same sections of a large plate, one need to print many different images (of different masks) one on top of the other. This is like to print a high-resolution color picture in an old printing house. First, one color is printed, then another, then a third ... Only with microcircuits it is even more complicated.
Each subsequent image should be perfectly aligned with the previous one. Otherwise, one conductor may pass by another and not provide the desired contact. Or create an unnecessary contact. Even just insufficient contact will increase the resistance of the conductor, which means that the entire microcircuit will become defective. So, before each exposure (of each chip), a plate with a diameter of tens of centimeters must be moved/shifted and positioned with perfect accuracy. After all, we are talking about combining elements thousands and tens of thousands of times smaller than the thickness of a hair!
Interesting information (published in 2012)
"Today’s most powerful computer chips are packed with billions of 20-nanometer transistors. Stacked on top of the transistors are tens of insulating layers threaded with copper wiring. At their smallest point, where the wires connect to the transistors, these wires are also about 20 nanometers."
...
and more:
"Today’s chips contain about 100 kilometers of copper wiring, so the potential for errors is huge. And if one of these wires doesn’t work because of a mistake in one layer—something that’s impossible to detect until the chip is completed and tested—the chip has to be tossed out. Tiny mistakes carry a big price tag: defects at a rate of one per billion lead to a 25 percent drop in yield..."
Making Wiring that Doesn’t Trip Up Computer Chips. Katherine Bourzacarchive.
MIT Technology Review. July 10, 2012
https://www.technologyreview.com/2012/07/10/185008/making-wiring-that-doesnt-trip-up-computer-chips/
Various tools
Various tools
It is also needs mentioning that the requirements for lithography vary from layer to layer. Record-breaking small sizes are required when “drawing” (printing) the very first, functional layers (transistors are located here, etc.). These layers are combined into the FEOL (Front-End-Of-Line) group. On top of the functional layers are layers of metal "wires" to provide electrical connections. The number of "metal" layers can be (usually) from 5 to 12 (!). These layers (together with the separating insulator layers) are combined into a BEOL (Back-End-Of-Line) group. The sizes (the width of the "wires" and the distance between them) on upper metal layers are much larger than in modern transistors. “Drawing” such layers using the same steppers that is used in lithography of transistors is the same as sawing logs with a jigsaw: of course, it is possible, but it is painfully unprofitable.
That is, in real mass production, not only the most advanced tools (steppers) are needed. Without the equipment that provides the previous levels of technology, it is possible to conduct research, make single, unique (and oh-oh-very expensive) things. But it is impossible to satisfy the growing market.
And one more time: let's recall the problem of alignment of layers (images). This problem must be solved for different steppers working in the same production chain.
And so on.
And so on.
It is also worth mentioning strict requirements for the cleanliness of industrial premises; an acceptable (or unacceptable? 😉) vibration level. And so on.
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Only the fulfillment of all stringent conditions at each stage of production allowed the semiconductor industry to become necessary literally everywhere and to change our life...
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